Port 092  -  System Control Port A (PS/2)

          11xx xxxx  Fixed-Disk Activity Light
                       These bits control the fixed-disk activity light.
                       Setting either bit to 1, turns tge fixed-disk
                       activity light on. Setting both bits to 0, turns the
                       light off.
          xx1x xxxx  Reserved
          xxx1 xxxx  Watchdog Timer Status
                       This read-only bit indicates the Watchdog Timer
                       status. When set to 1, a Watchdog time-out has
                       occured.
          xxxx 1xxx  Security Lock Latch
                       This bit provides the security lock for secured area
                       of RT/CMOS. Setting this bit to 1 electrically locks
                       the 8-byte, power-on password. Once this bit is set by
                       POST, it can only be cleared by turning the system
                       off.
          xxxx x1xx  Reserved (=0)
          xxxx xx1x  Alternate Gate A20
                       This bit is used to enable the 'address 20' signal
                       (A20) when the microprocessor is in the real address
                       mode. When set to 0, A20 cannot be used in real mode
                       addressing.
          xxxx xxx1  Alternate Hot Reset
                       This bit provides an alternate method of ressetting
                       the system microprocessor. This alternate method
                       supports operating systems requiring faster operation
                       than was provided on the IBM Personal Computer (R).
                       Resetting the system microprocessor is used to switch
                       the microprocessor from the protected mode to real
                       address mode (this is not nessasary on 80386 based
                       systems). The alternate reset takes 13.4 ms (the
                       original reset takes 30 ms), and the microprocessor
                       is death for interrupt in this period.